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M 6 8 E V B 9 0 8 Q L 4
1 2 / 0 4 / 0 3
LIN Connectors and Options
The LIN network connectors (LIN-J1 and LIN-J2) provide a standard pin configuration with a
network option position.
Front view (looking into connector from outside of board edge)
LIN Signal
Option pin
4
2
3
1
+VSUP Input
Ground
Mating connector = Molex 39-01-2040 with
39-00-0039 pins
Option pin 2 on the LIN connectors provides an additional ground or Test Pad to apply another
signal with the network. Test pad TP2 provides option access to LIN-J1 and TP3 provides
option access to LIN-J2. Option pad set 1 and 2 will provide connections to ground for LIN_J1
and LIN-J2 option pin 2 respectfully.
MC68HC980QL4 PORT CONNECTORS
MCU_PORT
The MCU PORT provides access to the MC68HC908QL4 I/O ports. Port configuration reflects
the DIP package device pin and signal order.
+5V (VDD)
PTA1/TCH1/KBI1
PTA2/IRQ*/KBI2/TCLK
PTA3/RST*/KBI3
PTB0/TCH0
PTB3/AD5
PTB2/AD4
PTB1
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
GND (VSS)
PTA0/AD0/KBD0
PTA5/OSC1/AD3/KBD5
PTA4/OSC2/AD2/KBI4
PTB4/SLCRX
PTB5/SLCTX
PTB6
PTB7
Notes:
1) PTA0 – 2, PTA4, and PTA5 applied with CYCLONE cable if installed.
2) PTA0 is also the MON08 debug monitor serial I/O (MON_EN).
3) PTA2 provides IRQ Push Switch input (JP1) or Monitor mode entry voltage (MON_EN).
4) PTA3 provides RESET Push Switch input (JP1).
5) PTB0 provides D1 indicator output (JP1).
6) PTB3/AD5 provides RV1 user pot input (JP1).
7) PTB4 provides LIN serial input (SLCRX).
8) PTB5 provides LIN serial output (SLCTX).
11
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相关PDF资料
M68KIT912D60A KIT EVALUATION FOR MC912D60A
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